firmware.list 6.2 KB

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  1. firmware.elf: file format elf32-msp430
  2. Disassembly of section .text:
  3. 0000c000 <__watchdog_support>:
  4. c000: 55 42 20 01 mov.b &0x0120,r5
  5. c004: 35 d0 08 5a bis #23048, r5 ;#0x5a08
  6. c008: 82 45 02 02 mov r5, &0x0202
  7. 0000c00c <__init_stack>:
  8. c00c: 31 40 00 04 mov #1024, r1 ;#0x0400
  9. 0000c010 <__do_copy_data>:
  10. c010: 3f 40 00 00 mov #0, r15 ;#0x0000
  11. c014: 0f 93 tst r15
  12. c016: 08 24 jz $+18 ;abs 0xc028
  13. c018: 92 42 02 02 mov &0x0202,&0x0120
  14. c01c: 20 01
  15. c01e: 2f 83 decd r15
  16. c020: 9f 4f 45 c1 mov -16059(r15),512(r15);0xc145(r15), 0x0200(r15)
  17. c024: 00 02
  18. c026: f8 23 jnz $-14 ;abs 0xc018
  19. 0000c028 <__do_clear_bss>:
  20. c028: 3f 40 02 00 mov #2, r15 ;#0x0002
  21. c02c: 0f 93 tst r15
  22. c02e: 07 24 jz $+16 ;abs 0xc03e
  23. c030: 92 42 02 02 mov &0x0202,&0x0120
  24. c034: 20 01
  25. c036: 1f 83 dec r15
  26. c038: cf 43 00 02 mov.b #0, 512(r15);r3 As==00, 0x0200(r15)
  27. c03c: f9 23 jnz $-12 ;abs 0xc030
  28. 0000c03e <main>:
  29. P1OUT ^= BIT0; // toggle P1.0 (red led)
  30. }
  31. int main(void)
  32. {
  33. WDTCTL = WDTPW + WDTHOLD; // Stop WDT
  34. c03e: b2 40 80 5a mov #23168, &0x0120 ;#0x5a80
  35. c042: 20 01
  36. BCSCTL1 = CALBC1_1MHZ; // Set DCO
  37. c044: d2 42 ff 10 mov.b &0x10ff,&0x0057
  38. c048: 57 00
  39. DCOCTL = CALDCO_1MHZ;
  40. c04a: d2 42 fe 10 mov.b &0x10fe,&0x0056
  41. c04e: 56 00
  42. P1DIR = BIT0 + BIT6; // P1.0 and P1.6 are the red+green LEDs
  43. c050: f2 40 41 00 mov.b #65, &0x0022 ;#0x0041
  44. c054: 22 00
  45. P1OUT = BIT0 + BIT6; // All LEDs off
  46. c056: f2 40 41 00 mov.b #65, &0x0021 ;#0x0041
  47. c05a: 21 00
  48. uart_init();
  49. c05c: b0 12 92 c0 call #0xc092
  50. // register ISR called when data was received
  51. uart_set_rx_isr_ptr(uart_rx_isr);
  52. c060: 3f 40 88 c0 mov #-16248,r15 ;#0xc088
  53. c064: b0 12 c2 c0 call #0xc0c2
  54. __bis_SR_register(GIE);
  55. c068: 32 d2 eint
  56. uart_puts((char *)"MSP430 harduart\n\r");
  57. c06a: 3f 40 1c c1 mov #-16100,r15 ;#0xc11c
  58. c06e: b0 12 e4 c0 call #0xc0e4
  59. uart_puts((char *)"Waiting for a tag ... ");
  60. c072: 3f 40 2e c1 mov #-16082,r15 ;#0xc12e
  61. c076: b0 12 e4 c0 call #0xc0e4
  62. unsigned char c = uart_getc();
  63. c07a: b0 12 c8 c0 call #0xc0c8
  64. 0000c07e <__stop_progExec__>:
  65. c07e: 32 d0 f0 00 bis #240, r2 ;#0x00f0
  66. c082: fd 3f jmp $-4 ;abs 0xc07e
  67. 0000c084 <__ctors_end>:
  68. c084: 30 40 1a c1 br #0xc11a
  69. 0000c088 <uart_rx_isr>:
  70. #include <msp430g2553.h>
  71. #include "uart.h"
  72. void uart_rx_isr(unsigned char c) {
  73. uart_putc(c);
  74. c088: b0 12 d6 c0 call #0xc0d6
  75. P1OUT ^= BIT0; // toggle P1.0 (red led)
  76. c08c: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01
  77. }
  78. c090: 30 41 ret
  79. 0000c092 <uart_init>:
  80. IE2 |= UCA0RXIE; // Enable USCI_A0 RX interrupt
  81. }
  82. void uart_set_rx_isr_ptr(void (*isr_ptr)(unsigned char c))
  83. {
  84. uart_rx_isr_ptr = isr_ptr;
  85. c092: 82 43 00 02 mov #0, &0x0200 ;r3 As==00
  86. void uart_init(void)
  87. {
  88. uart_set_rx_isr_ptr(0L);
  89. P1SEL = RXD + TXD;
  90. c096: f2 40 06 00 mov.b #6, &0x0026 ;#0x0006
  91. c09a: 26 00
  92. P1SEL2 = RXD + TXD;
  93. c09c: f2 40 06 00 mov.b #6, &0x0041 ;#0x0006
  94. c0a0: 41 00
  95. UCA0CTL1 |= UCSSEL_2; // SMCLK
  96. c0a2: f2 d0 80 ff bis.b #-128, &0x0061 ;#0xff80
  97. c0a6: 61 00
  98. UCA0BR0 = 104; // 1MHz 9600
  99. c0a8: f2 40 68 00 mov.b #104, &0x0062 ;#0x0068
  100. c0ac: 62 00
  101. UCA0BR1 = 0; // 1MHz 9600
  102. c0ae: c2 43 63 00 mov.b #0, &0x0063 ;r3 As==00
  103. UCA0MCTL = UCBRS0; // Modulation UCBRSx = 1
  104. c0b2: e2 43 64 00 mov.b #2, &0x0064 ;r3 As==10
  105. UCA0CTL1 &= ~UCSWRST; // Initialize USCI state machine
  106. c0b6: f2 f0 fe ff and.b #-2, &0x0061 ;#0xfffe
  107. c0ba: 61 00
  108. IE2 |= UCA0RXIE; // Enable USCI_A0 RX interrupt
  109. c0bc: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01
  110. }
  111. c0c0: 30 41 ret
  112. 0000c0c2 <uart_set_rx_isr_ptr>:
  113. void uart_set_rx_isr_ptr(void (*isr_ptr)(unsigned char c))
  114. {
  115. uart_rx_isr_ptr = isr_ptr;
  116. c0c2: 82 4f 00 02 mov r15, &0x0200
  117. }
  118. c0c6: 30 41 ret
  119. 0000c0c8 <uart_getc>:
  120. unsigned char uart_getc()
  121. {
  122. while (!(IFG2&UCA0RXIFG)); // USCI_A0 RX buffer ready?
  123. c0c8: 5f 42 03 00 mov.b &0x0003,r15
  124. c0cc: 1f f3 and #1, r15 ;r3 As==01
  125. c0ce: fc 27 jz $-6 ;abs 0xc0c8
  126. return UCA0RXBUF;
  127. c0d0: 5f 42 66 00 mov.b &0x0066,r15
  128. }
  129. c0d4: 30 41 ret
  130. 0000c0d6 <uart_putc>:
  131. void uart_putc(unsigned char c)
  132. {
  133. while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready?
  134. c0d6: 5e 42 03 00 mov.b &0x0003,r14
  135. c0da: 2e f3 and #2, r14 ;r3 As==10
  136. c0dc: fc 27 jz $-6 ;abs 0xc0d6
  137. UCA0TXBUF = c; // TX
  138. c0de: c2 4f 67 00 mov.b r15, &0x0067
  139. }
  140. c0e2: 30 41 ret
  141. 0000c0e4 <uart_puts>:
  142. void uart_puts(const char *str)
  143. {
  144. c0e4: 0b 12 push r11
  145. c0e6: 0b 4f mov r15, r11
  146. while(*str) uart_putc(*str++);
  147. c0e8: 03 3c jmp $+8 ;abs 0xc0f0
  148. c0ea: 1b 53 inc r11
  149. c0ec: b0 12 d6 c0 call #0xc0d6
  150. c0f0: 6f 4b mov.b @r11, r15
  151. c0f2: 4f 93 tst.b r15
  152. c0f4: fa 23 jnz $-10 ;abs 0xc0ea
  153. }
  154. c0f6: 3b 41 pop r11
  155. c0f8: 30 41 ret
  156. 0000c0fa <USCI0RX_ISR>:
  157. interrupt(USCIAB0RX_VECTOR) USCI0RX_ISR(void)
  158. {
  159. c0fa: 0f 12 push r15
  160. c0fc: 0e 12 push r14
  161. c0fe: 0d 12 push r13
  162. c100: 0c 12 push r12
  163. if(uart_rx_isr_ptr != 0L) {
  164. c102: 1e 42 00 02 mov &0x0200,r14
  165. c106: 0e 93 tst r14
  166. c108: 03 24 jz $+8 ;abs 0xc110
  167. (uart_rx_isr_ptr)(UCA0RXBUF);
  168. c10a: 5f 42 66 00 mov.b &0x0066,r15
  169. c10e: 8e 12 call r14
  170. }
  171. }
  172. c110: 3c 41 pop r12
  173. c112: 3d 41 pop r13
  174. c114: 3e 41 pop r14
  175. c116: 3f 41 pop r15
  176. c118: 00 13 reti
  177. 0000c11a <_unexpected_>:
  178. c11a: 00 13 reti
  179. Disassembly of section .vectors:
  180. 0000ffe0 <__ivtbl_16>:
  181. ffe0: 84 c0 84 c0 84 c0 84 c0 84 c0 84 c0 84 c0 fa c0 ................
  182. fff0: 84 c0 84 c0 84 c0 84 c0 84 c0 84 c0 84 c0 00 c0 ................